About Me

I’m a Ph.D. student at Department of Computer Science and Technology, Tsinghua University, advised by Prof. Wenjian Yu. I got my B.E. in Computer Science at Tsinghua University in 2022. Feel free to connect via e-mail or WeChat.

My name in Chinese: 黄杰辰.

Educations

• 2022 - 2027 (exp.), Ph.D. candidate in Computer Science and Technology, Tsinghua University.
• 2018 - 2022, B.E. in Computer Science and Technology, Tsinghua University.

Experiences

• 2025.12 - now, Research Intern, GLM Post-Training Team, Zhipu (Z.ai).

  • Working on agentic RL for code agents and long-horizon tasks.

  • Contributed to GLM-5.1 and GLM-5.2.

Publications

• Jiechen Huang, Hector Rodriguez, Dingcheng Yang, Zuochang Ye, Yibo Lin, and Wenjian Yu,
  “AttentionCap: Transformer based Capacitance Matrix Learning toward Full-Chip Extraction,”
  in Proc. Design Automation Conference (DAC), Long Beach, USA, Jul. 2026. [arXiv] [GitHub]

• Hector Rodriguez, Jiechen Huang, and Wenjian Yu,
  “CapBench: A Multi-PDK Dataset for Machine-Learning-based Post-Layout Capacitance Extraction,”
  in Proc. Design Automation Conference (DAC), Long Beach, USA, Jul. 2026. [arXiv] [GitHub]

• Hector Rodriguez*, Jiechen Huang*, and Wenjian Yu,
  “DeepRWCap: Neural-Guided Random-Walk Capacitance Solver for IC Design,”
  in Proc. AAAI Conference on Artificial Intelligence (AAAI), Singapore, Jan. 2026. (*equal contribution) [arXiv] [GitHub]

• Jiechen Huang and Wenjian Yu,
  “Efficient FRW Transitions via Stochastic Finite Differences for Handling Non-Stratified Dielectrics,”
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2025.

• Jiechen Huang, Shuailong Liu, and Wenjian Yu,
  “A Parallel Floating Random Walk Solver for Reproducible and Reliable Capacitance Extraction,”
  in Proc. Design, Automation & Test in Europe Conference (DATE), Lyon, France, Mar. 2025.

• Wenjian Yu, Shan Shen, Dingcheng Yang, Haoyuan Li, Jiechen Huang, and Chunyan Pei,
  “Deep Learning Inspired Capacitance Extraction Techniques,”
  in Proc. Asia South Pacific Design Automation Conference (ASPDAC), Tokyo, Japan, Jan. 2025.

• Jiechen Huang and Wenjian Yu,
  “Enhancing 3-D Random Walk Capacitance Solver with Analytic Surface Green’s Functions of Transition Cubes,”
  in Proc. ACM/IEEE Design Automation Conference (DAC), San Francisco, USA, Jun. 2024. [Package]

• Jiechen Huang, Ming Yang, and Wenjian Yu,
  “The Floating Random Walk Method With Symmetric Multiple-Shooting Walks for Capacitance Extraction,”
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 43(7): 2098-2111, 2024.

• Jiechen Huang, Wenjian Yu, Mingye Song, and Ming Yang,
  “Accelerated Capacitance Simulation of 3-D Structures with Considerable Amounts of General Floating Metals,”
  in Proc. Asia South Pacific Design Automation Conference (ASPDAC), Tokyo, Japan, Jan. 2023.

• Jiechen Huang, Xu Feng, and Wenjian Yu,
  “The Accelerated 3D Capacitance Extraction Based on Adaptive Low-Rank Matrix Factorization,”
  Journal of Computer-Aided Design & Computer Graphics, 2022.

Awards

• 2023, Champion, EDAthon, IEEE CEDA Hong Kong Chapter.
• 2022, Outstanding Graduate, Dept. CS, Tsinghua University.
• 2022, Outstanding Graduation Thesis, Tsinghua University.
• 2021, The Kirin Cup (Overall Champion), Integrated Circuit EDA Elite Challenge.

Teaching

• 2024 Spring & 2026 Spring, Teaching Assistant, Numerical Analysis, Tsinghua University.